NDLI: Analysis and Optimization of a Queueing Model of a Real-Time Computer Control System

Content Provider	IEEE Xplore Digital Library
Author	Schrage, L.
Copyright Year	1968
Description	A single processor provides service to jobs of several different priority classes. The priority ordering remains constant over time; however, the type of priority, i. e., preemptive or nonpreemptive, may depend upon the stage of processing of the job occupying the processor. We allow these preemptible and nonpreemptible intervals to be specified in a relatively arbitrary fashion. If a job is interrupted, a setup time must be incurred before processing can be continued on the job. If arrivals from all classes constitute independent Poisson streams, we are able to obtain expressions for the steady-state expected time in system for jobs of each class. These expressions are then analyzed to determine the optimum manner for assigning the preemptible and nonpreemptible intervals. When setup times are zero and preemptible portions are preemptive-resume, the optimal policy is fairly simple. When setup times are nonzero, the form of the optimal policy is not clear; however, numerical evaluations suggest that at high loads, e.g., greater than 0.9, one should allow much less preemption or time-sharing than one might suspect.
Sponsorship	IEEE Computer Society Technical Committee on Distributed Process IEEE Computer Society Technical Committee on VLSI IEEE Technical Committee on Computer Architecture IEEE Computer Society
Starting Page	997
Ending Page	1003
Page Count	7
File Size	990322
File Format	PDF
ISSN	00189340
Volume Number	C-18
Issue Number	11
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1969-11-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Computer models, optimization, priority queueing, real-time control, time-sharing.
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Computational Theory and Mathematics Software Hardware and Architecture

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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