NDLI: Novel Test-Mode-Only Scan Attack and Countermeasure for Compression-Based Scan Architectures

Content Provider	IEEE Xplore Digital Library
Author	Ali, S.S. Saeed, S.M. Sinanoglu, O. Karri, R.
Copyright Year	1982
Abstract	Scan design is a de facto design-for-testability (DfT) technique that enhances access during manufacturing test process. However, it can also be used as a back door to leak secret information from a secure chip. In existing scan attacks, the secret key of a secure chip is retrieved by using both the functional mode and the test mode of the chip. These attacks can be thwarted by applying a reset operation when there is a switch of mode. However, the mode-reset countermeasure can be thwarted by using only the test mode of a secure chip. In this paper, we perform a detailed analysis on the test-mode-only scan attack. We propose attacks on an advanced encryption standard (AES) design with a basic scan architecture as well as on an AES design with an advanced DfT infrastructure that comprises decompressors and compactors. The attack results show that indeed the secure chips are vulnerable to test-mode-only attacks. The secret key can be recovered within 1 s even in the presence of decompressors and compactors. We then propose new countermeasures to thwart these attacks. The proposed countermeasures incur minimal cost while providing high success rate.
Sponsorship	IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society
Starting Page	808
Ending Page	821
Page Count	14
File Size	1600763
File Format	PDF
ISSN	02780070
Volume Number	34
Issue Number	5
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Registers Vectors Ciphers Switches Circuit faults Computer architecture Silicon Security AES Decompressor Scan Chain Scan Attack Scan-based DfT Testability testability Advanced encryption standard (AES) decompressor scan attack scan-based design-for-testability (DfT) scan chain security
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software

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