NDLI: Zero-Crossing Disturbance Elimination and Spectrum Analysis of Single-Carrier Seven-Level SPWM

Content Provider	IEEE Xplore Digital Library
Author	Fengjiang Wu Fan Feng Jiandong Duan Bo Sun
Copyright Year	1982
Abstract	In this paper, a seven-level single-carrier and multi-modulation-wave sinusoidal pulsewidth modulation (SCMM-SPWM) strategy is proposed. In the negative half cycle of the modulation waves (MWs), dc offsets related to the amplitude of the carrier are set on the three MWs, respectively, to apply the same comparison logics of the MWs and carrier during positive and negative half cycles of the MWs. Thus, it is implemented with only one digital signal processor chip without any other attached logical circuit or controller. The reason for generating the zero-crossing voltage pulse disturbance (ZCVPD) in this strategy is analyzed, and the elimination of the ZCVPD is proposed and verified by experimental results. The spectral characters of the conventional multi-MW-based SPWM and the proposed one are originally derived and compared with each other by simulation in detail. The theoretical analysis, simulation, and experimental results indicate that the output characters of the proposed strategy are identical to those of the conventional one; it means that the proposed strategy can replace the conventional one while with the benefit of significantly reducing the cost and bulk of the implemental platform.
Sponsorship	IEEE Industrial Electronics Society
Starting Page	982
Ending Page	990
Page Count	9
File Size	1614952
File Format	PDF
ISSN	02780046
Volume Number	62
Issue Number	2
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Digital signal processing Pulse width modulation Inverters Switches Voltage control Field programmable gate arrays zero-crossing disturbance Multi-modulation-wave (MW) sinusoidal pulsewidth modulation (SPWM) seven-level spectral character
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Electrical and Electronic Engineering Computer Science Applications

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Dynamically Reconfigurable PWM Controller for Three-Phase Voltage-Source Inverters

Reducing the Common-Mode Voltage through Carrier Peak Position Modulation in an SPWM Three-Phase Inverter

Variable Modulation Offset SPWM Control to Balance the Neutral-Point Voltage for Three-Level Inverters

Development of an FPGA-Based SPWM Generator for High Switching Frequency DC/AC Inverters

An FPGA-Based Digital Modulator for Full- or Half-Bridge Inverter Control

An Efficient SVPWM Algorithm With Low Computational Overhead for Three-Phase Inverters

Dual-Mode Double-Carrier-Based Sinusoidal Pulse Width Modulation Inverter With Adaptive Smooth Transition Control Between Modes

Dead-Time Elimination for Voltage Source Inverters

Design and implementation of FPGA based high definition sinusoidal pulse width modulation technique for voltage source inverter applications

Zero-Crossing Disturbance Elimination and Spectrum Analysis of Single-Carrier Seven-Level SPWM

Similar Documents

Dynamically Reconfigurable PWM Controller for Three-Phase Voltage-Source Inverters

Reducing the Common-Mode Voltage through Carrier Peak Position Modulation in an SPWM Three-Phase Inverter

Variable Modulation Offset SPWM Control to Balance the Neutral-Point Voltage for Three-Level Inverters

Development of an FPGA-Based SPWM Generator for High Switching Frequency DC/AC Inverters

An FPGA-Based Digital Modulator for Full- or Half-Bridge Inverter Control

An Efficient SVPWM Algorithm With Low Computational Overhead for Three-Phase Inverters

Dual-Mode Double-Carrier-Based Sinusoidal Pulse Width Modulation Inverter With Adaptive Smooth Transition Control Between Modes

Dead-Time Elimination for Voltage Source Inverters

Design and implementation of FPGA based high definition sinusoidal pulse width modulation technique for voltage source inverter applications

Zero-Crossing Disturbance Elimination and Spectrum Analysis of Single-Carrier Seven-Level SPWM