NDLI: Yield Learning Curve Models in Semiconductor Manufacturing

Content Provider	IEEE Xplore Digital Library
Author	Tirkel, I.
Copyright Year	1988
Abstract	Semiconductor manufacturing is a constantly growing business characterized with complex production processes, advanced equipment, and volatile demand. In wafer fabrication where die are produced, good and defected die are combined on the same wafer. The proportion between good and total die, noted (die) yield, is a key performance measure in operations and has a dominant effect on manufacturing economics. Integrated circuits life cycle commonly starts with low yields that should be significantly increased and then maintained at a high level, to maximize profit. Traditional manufacturing learning curves are in the form of a power function, and exhibit decreasing cost as a function of cumulative output. This study suggests generalized multi-factor learning curves composed of power and exponential functions of cumulative output, elapsed time, and production rate. It presents a unique approach to develop compound yield learning model as a product of individual steps yield learning curves, rather than displaying total yield in former models. The proposed single step yield learning curve applies more suitable exponential function, and the compound yield product-form model illustrates sigmoid shape curve which better coincides with practice. These models provide yield forecasting tools for improving short term operations planning and supply chain efficiency, and for setting strategic directions for wafer fabrication economics.
Sponsorship	IEEE Electron Devices Society IEEE Components, Packaging, and Manufacturing Technology Society IEEE Reliability Society IEEE Solid-State Circuits Society
Starting Page	564
Ending Page	571
Page Count	8
File Size	4444944
File Format	PDF
ISSN	08946507
Volume Number	26
Issue Number	4
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fabrication Yield estimation Industrial economics Semiconductor device modeling Semiconductor device measurement yield Compound yield learning curve progress curve wafer fabrication
Content Type	Text
Resource Type	Article
Subject	Industrial and Manufacturing Engineering Condensed Matter Physics Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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Yield learning and the sources of profitability in semiconductor manufacturing and process development

Scheduling semiconductor wafer fabrication

Wafer Classification Using Support Vector Machines

Application of Generalized Linear Models to Predict Semiconductor Yield Using Defect Metrology Data

On the relationship between yield and cycle time in semiconductor wafer fabrication

In-line Inspection Impact on Cycle Time and Yield

Simulation of yield/cost learning curves with Y4

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Yield Learning Curve Models in Semiconductor Manufacturing

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Wafer Classification Using Support Vector Machines

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On the relationship between yield and cycle time in semiconductor wafer fabrication

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