NDLI: Minimum-Deviation Digital Controller IC for DC

Content Provider	IEEE Xplore Digital Library
Author	Radic, A. Lukic, Z. Prodic, A. de Nie, R.H.
Copyright Year	1986
Abstract	This paper introduces a hardware-efficient digital controller integrated circuit (IC) for single- and two-phase dc-dc converters that recovers from load transients with virtually minimum possible output voltage deviation. In steady state, the IC behaves as a conventional voltage-mode pulsewidth modulation controller. During load changes, it enters transient suppression mode that utilizes a simple algorithm, requiring no knowledge of the converter parameters and virtually no processing power, to seamlessly recover back to the steady state without exposing components to a high-current stress. To further minimize the area and power consumption of the IC, an asynchronous track-and-hold analog-to-digital converter (ADC) is developed. The ADC utilizes only one preamplifier and four comparators having approximately ten times smaller silicon area and power consumption than a comparable windowed flash ADC. To compensate effects of converter losses and system delays on the controller operation, the IC also incorporates duty ratio correction logic and dual-extreme point-based detection. The entire IC is implemented in a CMOS 0.18-μm process on a 0.26-mm² silicon area, which is comparable to the state-of-the-art analog solutions. The functionality of the controller is tested with both single- and two-phase commercial 12-1.8 V, 500-kHz 60/120-W buck converter power stages. The results demonstrate seamless transition to the steady state with virtually minimum output voltage deviation. For the experimental system, this deviation is about four times smaller than that of a fast PID compensator having a one-tenth of the switching frequency bandwidth.
Sponsorship	IEEE Power Electronics Society
Starting Page	4281
Ending Page	4298
Page Count	18
File Size	2076992
File Format	PDF
ISSN	08858993
Volume Number	28
Issue Number	9
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-09-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	parameter insensitive Digital controller IC fast response low-power dc–dc converters
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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