NDLI: Struktur und Arbeitsweise der Telefunken-Digitalrechenanlage TR 4

Content Provider	IEEE Xplore Digital Library
Author	Ulbrich, Egbert
Copyright Year	1963
Abstract	The TR4 is a high-speed computer, constructed with modern techniques, and suitable for commercial as well as for technical and scientific applications. The central processing unit can communicate directly, without additional intervening elements, with the usual input and output devices. The basic design of software and hardware allows the user to benefit from effective programming techniques and parallel processing without extra programming burdens. This last objective is fulfilled by assigning frequently recurring software tasks to the control of the flexible central processor, while other software tasks are performed via a powerful wired in readonly memory. Übersicht-Die TR4 ist eine in neuzeitlicher Technik gebaute schnelle Rechenanlage, die sich in gleicher Weise für kommerzielle wie für technisch-wissenschaftliche Anwendungen eignet. Der zentrale Rechner kann ohne zusätzliche Zwischenglieder unmittelbar mit den üblichen Ein- und Ausgabegeräte verkehren. Der Grundbestand an software und hardware ist so realisiert, daß sich der Benutzer ohne zusätzliche Belastung einer effektiven Programmierungstechnik sowie der Parallelarbeit bedienen kann. Die Erfüllung dieser letzen Forderung wurde gelöst indem ein Teil der sehr oft von der software übernommenen Aufgaben unschwer der flexiblen zentralen Steuerung übertragen wird; ein weiterer Teil wird durch ein wirkungsvolles, im Festspeicher verdrahtetes Programm realisiert.
Starting Page	613
Ending Page	618
Page Count	6
File Size	2100372
File Format	PDF
ISSN	03677508
Volume Number	EC-12
Issue Number	6
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1963-12-01
Publisher Place	New York, U.S.A.
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Hardware Density estimation robust algorithm Parallel programming Art Concurrent computing Application software Central Processing Unit Software design Parallel processing High performance computing
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Computational Theory and Mathematics Software Hardware and Architecture

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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