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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Falcao, G. Sousa, L. Silva, V. |
| Copyright Year | 1990 |
| Abstract | Unlike usual VLSI approaches necessary for the computation of intensive Low-Density Parity-Check (LDPC) code decoders, this paper presents flexible software-based LDPC decoders. Algorithms and data structures suitable for parallel computing are proposed in this paper to perform LDPC decoding on multicore architectures. To evaluate the efficiency of the proposed parallel algorithms, LDPC decoders were developed on recent multicores, such as off-the-shelf general-purpose x86 processors, Graphics Processing Units (GPUs), and the CELL Broadband Engine (CELL/B.E.). Challenging restrictions, such as memory access conflicts, latency, coalescence, or unknown behavior of thread and block schedulers, were unraveled and worked out. Experimental results for different code lengths show throughputs in the order of 1 ~ 2 Mbps on the general-purpose multicores, and ranging from 40 Mbps on the GPU to nearly 70 Mbps on the CELL/B.E. The analysis of the obtained results allows to conclude that the CELL/B.E. performs better for short to medium length codes, while the GPU achieves superior throughputs with larger codes. They achieve throughputs that in some cases approach very well those obtained with VLSI decoders. From the analysis of the results, we can predict a throughput increase with the rise of the number of cores. |
| Sponsorship | IEEE Computer Society |
| Starting Page | 309 |
| Ending Page | 322 |
| Page Count | 14 |
| File Size | 3086240 |
| File Format | |
| ISSN | 10459219 |
| Volume Number | 22 |
| Issue Number | 2 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-02-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Parity check codes Decoding Multicore processing Throughput Computer architecture Very large scale integration Data structures Parallel processing Parallel algorithms Graphics OpenMP. LDPC data-parallel computing multicore graphics processing units GPU CUDA CELL |
| Content Type | Text |
| Resource Type | Article |
| Subject | Signal Processing Computational Theory and Mathematics Hardware and Architecture |
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