NDLI: Silicon Nanowire All-Around Gate MOSFETs Built on a Bulk Substrate by All Plasma-Etching Routes

Content Provider	IEEE Xplore Digital Library
Author	Dong-Il Moon Sung-Jin Choi Chung-Jin Kim Jee-Yeon Kim Jin-Seong Lee Jae-Sub Oh Gi-Sung Lee Yun-Chang Park Dae-Won Hong Dong-Wook Lee Young-Su Kim Jeoung-Woo Kim Jin-Woo Han Yang-Kyu Choi
Copyright Year	1980
Abstract	A gate length of 25 nm and a silicon nanowire (SiNW) with a width of 6 nm and a height of 10 nm fully surrounded by a gate are demonstrated. A suspended SiNW, which is fully depleted, is fabricated on a bulk substrate by employing the deep reactive-ion etching process known as the Bosch process. The electrical characteristics and short-channel effects (SCEs) of the SiNW MOSFETs with all-around gates are presented. The fabricated devices show excellent immunity against SCEs despite their being built on a bulk substrate and having gate lengths scaled down to the 25-nm regime. Improved electrostatic characteristics that suppress the SCEs are shown when the dimension of the SiNW is reduced.
Sponsorship	IEEE Electron Devices Society
Starting Page	452
Ending Page	454
Page Count	3
File Size	467378
File Format	PDF
ISSN	07413106
Volume Number	32
Issue Number	4
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-04-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Silicon Logic gates MOSFETs Substrates Etching Fabrication silicon nanowire (SiNW) All-around gate (AAG) Bosch process bulk MOSFET deep reactive-ion etch gate-all-around plasma etching short-channel effects (SCEs)
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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