NDLI: On Efficient LHS-Based Yield Analysis of Analog Circuits

Content Provider	IEEE Xplore Digital Library
Author	Jaffari, J. Anis, M.
Copyright Year	1982
Abstract	The Latin hypercube sampling (LHS) has been used as a variance-reduction estimation tool for an efficient sampling-based variability analysis of analog circuits. For a certain estimation confidence interval, a lower number of LHS samples is needed than that of Monte Carlo due to the estimation variance reduction. In this paper, an analysis of variance decomposition of the indicator function, the yield function, reveals strong contribution of interactive terms in the variance of the yield function, leading to limited performance gain of the traditional LHS sampling. In order to improve its efficiency, two correlation-controlled LHS methods are developed to reduce the required number of LHS samples for analog circuit yield estimation.
Sponsorship	IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society
Starting Page	159
Ending Page	163
Page Count	5
File Size	236128
File Format	PDF
ISSN	02780070
Volume Number	30
Issue Number	1
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Measurement Analog circuits Yield estimation Monte Carlo methods Transistors Hypercubes yield estimation Analog very large scale integration (VLSI) circuits latin hypercube sampling (LHC)
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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