NDLI: SACTA: A Self-Adjusting Clock Tree Architecture for Adapting to Thermal-Induced Delay Variation

Content Provider	IEEE Xplore Digital Library
Author	Jieyi Long Ja Chun Ku Memik, S.O. Ismail, Y.
Copyright Year	1993
Abstract	Aggressive technology scaling down and low-power design techniques lead to uneven distributed power density, which translates into heat flow in the chips, causing significant temperature variations in both spatial and temporal terms. In order to mitigate the negative impacts of temperature variations on circuit timing, we propose SACTA, a self-adjusting clock tree architecture, which performs temperature-dependent dynamic clock skew scheduling to prevent timing violations in a pipelined circuit. The dynamic and adaptive features of SACTA are enabled by our proposed automatic temperature-adjustable skew buffers and temperature-insensitive skew buffers. These special delay elements are carefully tuned to ensure resilience of the entire circuit against temperature variation. To determine their configurations, we proposed an efficient and general clock tree design and optimization framework. Furthermore, we show that SACTA is applicable across a wide spectrum of circuits, including multi-V_dd/V_th designs. Experimental results show that a pipeline supported by SACTA is able to prevent thermal-induced timing violations within a significantly larger range of operating temperatures (on average, the violation-free range can be enhanced by over 15°C).
Sponsorship	IEEE Computer Society Association for Computing Machinery (ACM)/SIGDA IEEE Computer Society Technical Committee on Design Automation
Starting Page	1323
Ending Page	1336
Page Count	14
File Size	1206637
File Format	PDF
ISSN	10638210
Volume Number	18
Issue Number	9
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-09-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Clocks Delay Timing Circuits Cooling Pipelines Voltage Temperature dependence Resilience Energy consumption variation-tolerance Clock tree architecture design automation self-adjusting
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Software Hardware and Architecture

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SACTA: A Self-Adjusting Clock Tree Architecture for Adapting to Thermal-Induced Delay Variation

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SACTA: A Self-Adjusting Clock Tree Architecture for Adapting to Thermal-Induced Delay Variation