NDLI: Threshold-Switching Delay Controlled by <formula formulatype=inline><tex Notation=TeX>$hbox{1}/f$ </tex></formula> Current Fluctuations in Phase-Change Memory Devices

Content Provider	IEEE Xplore Digital Library
Author	Lavizzari, S. Sharma, D. Ielmini, D.
Copyright Year	1963
Abstract	Threshold switching, i.e., the electrical transition from high to low resistivity in amorphous semiconductors, plays a major role in the program/erase processes of phase-change memory (PCM) devices. Understanding and designing materials and cell structures for optimum memory performance require that accurate models for threshold switching be developed, in both the steady-state and the transient regime. This work presents an experimental and modeling study of threshold switching in amorphous chalcogenide materials for PCM applications. The delay time for the onset of threshold switching from the application of an electrical pulse is explained based on 1/f fluctuations of the subthreshold current. A Monte Carlo model is developed for calculating the statistical distribution of delay times. The model can account for 1) the voltage dependence of the average delay time and 2) the statistical spread of the delay time for both rectangular and triangular voltage waveforms. The delay model is used for a reliability assessment of read disturb in PCM devices.
Sponsorship	IEEE Electron Devices Society
Starting Page	1047
Ending Page	1054
Page Count	8
File Size	858654
File Format	PDF
ISSN	00189383
Volume Number	57
Issue Number	5
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-05-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Switches Delay Noise Phase change materials Current measurement Resistance Numerical models $\hbox{1}/f$ noise Amorphous semiconductors chalcogenide materials nonvolatile memory phase-change memory (PCM) read disturb
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Transient Simulation of Delay and Switching Effects in Phase-Change Memories

Voltage-Controlled Relaxation Oscillations in Phase-Change Memory Devices

Electronic switching effect and phase-change transition in chalcogenide materials

Modeling of Programming and Read Performance in Phase-Change Memories—Part II: Program Disturb and Mixed-Scaling Approach

Threshold and Filament Current Densities in Chalcogenide-Based Switches and Phase-Change-Memory Devices

Understanding Overreset Transition in Phase-Change Memory Characteristics

$hbox{1}/f$ Noise in 45-nm RESET-State Phase-Change Memory Devices: Characterization, Impact on Memory Readout Operation, and Scaling Perspectives

Resistive Switching Mechanism in $hbox{Zn}_{x}hbox{Cd}_{1 - x}hbox{S}$ Nonvolatile Memory Devices

Reliability Impact of Chalcogenide-Structure Relaxation in Phase-Change Memory (PCM) Cells—Part I: Experimental Study

Threshold-Switching Delay Controlled by $hbox{1}/f$ Current Fluctuations in Phase-Change Memory Devices

Similar Documents

Transient Simulation of Delay and Switching Effects in Phase-Change Memories

Voltage-Controlled Relaxation Oscillations in Phase-Change Memory Devices

Electronic switching effect and phase-change transition in chalcogenide materials

Modeling of Programming and Read Performance in Phase-Change Memories—Part II: Program Disturb and Mixed-Scaling Approach

Threshold and Filament Current Densities in Chalcogenide-Based Switches and Phase-Change-Memory Devices

Understanding Overreset Transition in Phase-Change Memory Characteristics

$hbox{1}/f$ Noise in 45-nm RESET-State Phase-Change Memory Devices: Characterization, Impact on Memory Readout Operation, and Scaling Perspectives

Resistive Switching Mechanism in $hbox{Zn}_{x}hbox{Cd}_{1 - x}hbox{S}$ Nonvolatile Memory Devices

Reliability Impact of Chalcogenide-Structure Relaxation in Phase-Change Memory (PCM) Cells—Part I: Experimental Study

Threshold-Switching Delay Controlled by $hbox{1}/f$ Current Fluctuations in Phase-Change Memory Devices