NDLI: On the Pseudomorphic High Electron Mobility Transistors (PHEMTs) With a Low-Temperature Gate Approach

Content Provider	IEEE Xplore Digital Library
Author	Li-Yang Chen Huey-Ing Chen Shiou-Ying Cheng Tzu-Pin Chen Tsung-Han Tsai Yi-Jung Liu Yi-Wen Huang Chien-Chang Huang Wen-Chau Liu
Copyright Year	1980
Abstract	The characteristics of AlGaAs/InGaAs/GaAs depletion-mode (D-mode) and enhancement-mode (E-mode) pseudomorphic high electron mobility transistors (PHEMTs) fabricated using an electroless-plated (EP) deposition approach are investigated. Under the low-temperature and low-energy conditions, the EP deposition approach can form a better metal-semiconductor interface. For the studied devices, with a 1times100 mum² gate dimension, excellent characteristics of the maximum drain saturation current (168.9 mA/mm) and extrinsic transconductance (225.8 mS/mm) are obtained for the D-mode device. The corresponding values for the E-mode device are 152.5 mA/mm and 211.7 mS/mm, respectively. Moreover, the EP approach also has the advantages of easy operation and low cost.
Sponsorship	IEEE Electron Devices Society
Starting Page	325
Ending Page	327
Page Count	3
File Size	198219
File Format	PDF
ISSN	07413106
Volume Number	30
Issue Number	4
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-04-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	PHEMTs Electron mobility HEMTs MODFETs Gallium arsenide Indium gallium arsenide Costs Voltage Schottky barriers Ohmic contacts pseudomorphic high electron mobility transistor (PHEMT) Electroless plated (EP) enhancement-mode (E-mode)
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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