NDLI: Fixed-Priority Allocation and Scheduling for Energy-Efficient Fault Tolerance in Hard Real-Time Multiprocessor Systems

Content Provider	IEEE Xplore Digital Library
Author	Wei, T. Mishra, P. Wu, K. Liang, H.
Copyright Year	1990
Abstract	Energy-efficient task allocation and scheduling schemes with deterministic fault-tolerance capabilities are proposed for symmetric multiprocessor systems executing tasks with hard real-time constraints. The proposed heuristic is proven to achieve energy savings by optimally balancing application workload among processors in a system. Based on the observation that fault-free operation is expected to remain dominant in the near future and the probability of the worst case faults is low, an optimistic fault-tolerant heuristic is then proposed to achieve maximum energy savings in the absence of faults while degrading gradually to meet application timing requirements in the worst case of faults. Simulation results show that compared to state-of-art allocation and scheduling schemes proposed heuristic achieves average energy savings of up to 70%. It is also shown that optimistic approach is more resilient to variations in application utilizations and fault occurrences beyond system specifications.
Sponsorship	IEEE Computer Society
Starting Page	1511
Ending Page	1526
Page Count	16
File Size	3979681
File Format	PDF
ISSN	10459219
Volume Number	19
Issue Number	11
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-11-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Energy efficiency Fault tolerant systems Real time systems Multiprocessing systems Circuit faults Processor scheduling Embedded system Parallel processing Checkpointing Fault tolerance Scheduling and task partitioning Energy-aware systems Real-time and embedded systems Multiprocessor Systems
Content Type	Text
Resource Type	Article
Subject	Signal Processing Computational Theory and Mathematics Hardware and Architecture

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Fault-tolerance through scheduling of aperiodic tasks in hard real-time multiprocessor systems

Reliability-Driven Energy-Efficient Task Scheduling for Multiprocessor Real-Time Systems

Design Optimization of Time- and Cost-Constrained Fault-Tolerant Embedded Systems With Checkpointing and Replication

A fault-tolerant dynamic scheduling algorithm for multiprocessor real-time systems and its analysis

A unified approach for fault tolerance and dynamic power management in fixed-priority real-time embedded systems

Energy Efficient Scheduling of Real-Time Tasks on Multicore Processors

Energy-Aware Real-Time Task Scheduling in Multiprocessor Systems Using a Hybrid Genetic Algorithm

Fault-tolerant rate-monotonic first-fit scheduling in hard-real-time systems

Design of Fast and Efficient Energy-Aware Gradient-Based Scheduling Algorithms Heterogeneous Embedded Multiprocessor Systems

Fixed-Priority Allocation and Scheduling for Energy-Efficient Fault Tolerance in Hard Real-Time Multiprocessor Systems

Similar Documents

Fault-tolerance through scheduling of aperiodic tasks in hard real-time multiprocessor systems

Reliability-Driven Energy-Efficient Task Scheduling for Multiprocessor Real-Time Systems

Design Optimization of Time- and Cost-Constrained Fault-Tolerant Embedded Systems With Checkpointing and Replication

A fault-tolerant dynamic scheduling algorithm for multiprocessor real-time systems and its analysis

A unified approach for fault tolerance and dynamic power management in fixed-priority real-time embedded systems

Energy Efficient Scheduling of Real-Time Tasks on Multicore Processors

Energy-Aware Real-Time Task Scheduling in Multiprocessor Systems Using a Hybrid Genetic Algorithm

Fault-tolerant rate-monotonic first-fit scheduling in hard-real-time systems

Design of Fast and Efficient Energy-Aware Gradient-Based Scheduling Algorithms Heterogeneous Embedded Multiprocessor Systems

Fixed-Priority Allocation and Scheduling for Energy-Efficient Fault Tolerance in Hard Real-Time Multiprocessor Systems