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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Aksoy, L. da Costa, E. Flores, P. Monteiro, J. |
| Copyright Year | 1982 |
| Abstract | The main contribution of this paper is an exact common subexpression elimination algorithm for the optimum sharing of partial terms in multiple constant multiplications (MCMs). We model this problem as a Boolean network that covers all possible partial terms that may be used to generate the set of coefficients in the MCM instance. We cast this problem into a 0-1 integer linear programming (ILP) by requiring that the single output of this network is asserted while minimizing the number of gates representing operations in the MCM implementation that evaluate to one. A satisfiability (SAT)-based 0-1 ILP solver is used to obtain the exact solution. We argue that for many real problems, the size of the problem is within the capabilities of current SAT solvers. Because performance is often a primary design parameter, we describe how this algorithm can be modified to target the minimum area solution under a user-specified delay constraint. Additionally, we propose an approximate algorithm based on the exact approach with extremely competitive results. We have applied these algorithms on the design of digital filters and present a comprehensive set of results that evaluate ours and existing approximation schemes against exact solutions under different number representations and using different SAT solvers. |
| Sponsorship | IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society |
| Starting Page | 1013 |
| Ending Page | 1026 |
| Page Count | 14 |
| File Size | 668759 |
| File Format | |
| ISSN | 02780070 |
| Volume Number | 27 |
| Issue Number | 6 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-06-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Delay Signal processing algorithms Finite impulse response filter Algorithm design and analysis Digital signal processing Integer linear programming Approximation algorithms Digital filters Constraint optimization Fast Fourier transforms pseudo-Boolean optimization (PBO) Canonical signed digit (CSD) common subexpression elimination (CSE) delay constraints minimal signed digit (MSD) multiple constant multiplications (MCMs) |
| Content Type | Text |
| Resource Type | Article |
| Subject | Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software |
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