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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Yamamoto, K. Carusone, A.C. Dawson, F.P. |
| Copyright Year | 1966 |
| Abstract | In this paper, analysis and design of a four-bit fourth- order delta-sigma modulator with a widely programmable center frequency are presented. Novel methods for quantizing and implementing the digitally programmable modulator coefficients enable performance comparable to state-of-the-art discrete-time fixed- frequency modulators at any center frequency from DC to 0.31 fs in steps of 0.0052 fs. The 0.18 mum 1.8 V CMOS prototype implemented in a silicon area of 4.5 mm 2 consumes 115 mW at a sampling frequency of 40 MHz. The SNDR and SNR over a 310 kHz bandwidth range from 71 dB to 82 dB and from 76 dB to 86 dB, respectively. |
| Sponsorship | IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE |
| Starting Page | 1772 |
| Ending Page | 1782 |
| Page Count | 11 |
| File Size | 1233814 |
| File Format | |
| ISSN | 00189200 |
| Volume Number | 43 |
| Issue Number | 8 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-08-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Delta modulation Modulation coding Frequency Bandwidth Receivers Tuning Sampling methods Oscillators Digital modulation CMOS technology sigma- delta Analog-to-digital converter (ADC) bandpass delta-sigma low-pass multibit programmable tunable |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering |
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