NDLI: A novel computational complexity and power reduction technique for H.264 intra prediction

Content Provider	IEEE Xplore Digital Library
Author	Parlak, M. Adibelli, Y. Hamzaoglu, I.
Copyright Year	1975
Abstract	H.264 intra prediction algorithm has a very high computational complexity. This paper proposes a novel technique for reducing the amount of computations performed by H.264 intra prediction algorithm and therefore reducing the power consumption of H.264 intra prediction hardware significantly without any PSNR and bitrate loss. The proposed technique performs a small number of comparisons among neighboring pixels of the current block before the intra prediction process. If the neighboring pixels of the current block are equal, the prediction equations of H.264 intra prediction modes simplify significantly for this block. By exploiting the equality of the neighboring pixels, the proposed technique reduces the amount of computations performed by 4times4 luminance, 16times16 luminance, and 8times8 chrominance prediction modes up to 60%, 28%, and 68% respectively with a small comparison overhead. We also implemented an efficient 4times4 intra prediction hardware including the proposed technique using Verilog HDL. We quantified the impact of the proposed technique on the power consumption of this hardware on a Xilinx Virtex II FPGA using Xilinx XPower, and it reduced the power consumption of this hardware up to 18.6%.
Sponsorship	IEEE Consumer Electronics Society
File Size	579883
File Format	PDF
ISSN	00983063
Volume Number	54
Issue Number	4
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-11-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Computational complexity Prediction algorithms Video compression Energy consumption Equations PSNR Bit rate Hardware design languages Field programmable gate arrays Standards development FPGA H.264 Intra Prediction Low Power Hardware Implementation
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Media Technology

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