NDLI: On-Chip Capacitance Sensing for Cell Monitoring Applications

Content Provider	IEEE Xplore Digital Library
Author	Prakash, S.B. Abshire, P.
Copyright Year	2001
Abstract	We describe an integrated circuit for sensing the substrate coupling capacitance of anchorage-dependent living cells in a standard culture environment. Capacitance is measured using charge redistribution in response to weak, low frequency electric field excitations. The underlying biophysical phenomenon results primarily from the insulating nature of the cell structure and the counterionic polarization in the surrounding aqueous medium. The measured capacitance depends on a variety of factors related to the cell, its growth environment and the supporting substrate. These include membrane integrity, morphology, extracellular ionic concentration, adhesion strength, and substrate proximity. The measured capacitance is an indication of both the interaction between cells and substrate and cell health. The capacitance sensor uses the principle of charge sharing and translates sensed capacitance values to output voltages. The sensor chip has been fabricated in a commercially available 0.5-mum, 2-poly 3-metal CMOS technology. The sensing technique does not require direct electrical connection to the aqueous culture medium. We report results from experiments demonstrating on-chip tracking of cell adhesion as well as long term monitoring of cell viability in vitro
Sponsorship	IEEE Sensors Council
Starting Page	440
Ending Page	447
Page Count	8
File Size	1967738
File Format	PDF
ISSN	1530437X
Volume Number	7
Issue Number	3
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-03-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Monitoring Capacitance measurement Adhesives CMOS technology Coupling circuits Current measurement Charge measurement Frequency measurement Electric variables measurement Integrated circuit measurements mixed analog-digital integrated circuits Bioelectric phenomena biological cells biomedical transducers capacitance measurement capacitance transducers CMOS integrated circuits dielectric measurements dielectric polarization
Content Type	Text
Resource Type	Article
Subject	Instrumentation Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A Fully Differential Rail-to-Rail CMOS Capacitance Sensor With Floating-Gate Trimming for Mismatch Compensation

A broad-bandwidth mixed analog/digital integrated circuit for the measurement of complex impedance

A physical parametric transistor model for CMOS circuit simulation

An interface circuit for high-accuracy signal processing of differential-capacitance transducers

Voltage-comparator-based measurement of equivalently sampled substrate noise waveforms in mixed-signal integrated circuits

Substrate coupling in digital circuits in mixed-signal smart-power systems

A 50-Mbit/s CMOS optical transmitter integrated circuit

Measurement of digital noise in mixed-signal integrated circuits

An on-chip, interconnect capacitance characterization method with sub-femto-farad resolution

On-Chip Capacitance Sensing for Cell Monitoring Applications

Similar Documents

A Fully Differential Rail-to-Rail CMOS Capacitance Sensor With Floating-Gate Trimming for Mismatch Compensation

A broad-bandwidth mixed analog/digital integrated circuit for the measurement of complex impedance

A physical parametric transistor model for CMOS circuit simulation

An interface circuit for high-accuracy signal processing of differential-capacitance transducers

Voltage-comparator-based measurement of equivalently sampled substrate noise waveforms in mixed-signal integrated circuits

Substrate coupling in digital circuits in mixed-signal smart-power systems

A 50-Mbit/s CMOS optical transmitter integrated circuit

Measurement of digital noise in mixed-signal integrated circuits

An on-chip, interconnect capacitance characterization method with sub-femto-farad resolution

On-Chip Capacitance Sensing for Cell Monitoring Applications