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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Tom Tong Jing Zhe Feng Yu Hu Hong, X.L. Hu, X.D. Yan, G.Y. |
| Copyright Year | 1982 |
| Abstract | Obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) construction is an essential part of routing. Recently, IC routing and related researches have been extended from Manhattan architecture (lambda2-geometry) to Y-/X-architecture (lambda3-lambda4-geometry) to improve the chip performance. This paper presents an O(n log n) heuristic, lambda-OAT, for obstacle-avoiding Steiner minimal tree construction in the lambda-geometry plane (lambda-OASMT). In this paper, based on obstacle-avoiding constrained Delaunay triangulation, a full connected tree is constructed and then embedded into lambda-OASMT by zonal combination. To the best of our knowledge, this is the first work addressing the lambda-OASMT problem. Compared with most recent works on OARSMT problem, lambda-OAT obtains up to 30-Kx speedup with quality solution. We have tested randomly generated cases with up to 10 K terminals and 10-K rectilinear obstacles within 4 seconds on a Sun V880 workstation (755-MHz CPU and 4-GB memory). The high efficiency and accuracy of lambda-OAT make it extremely practical and useful in the routing phase. |
| Sponsorship | IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society |
| Starting Page | 2073 |
| Ending Page | 2079 |
| Page Count | 7 |
| File Size | 430287 |
| File Format | |
| ISSN | 02780070 |
| Volume Number | 26 |
| Issue Number | 11 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-11-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Routing Steiner trees Very large scale integration Wire Computer science education Educational programs Computer science Large-scale systems Testing Sun very large scale integration (VLSI) Physical design routing Steiner tree |
| Content Type | Text |
| Resource Type | Article |
| Subject | Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software |
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