NDLI: Optimization of Tracking Performance of CMOS Monolithic Active Pixel Sensors

Content Provider	IEEE Xplore Digital Library
Author	Dulinski, W. Besson, A. Claus, G. Colledani, C. Deptuch, G. Deveaux, M. Gaycken, G. Grandjean, D. Himmi, A. Hu, C. Jaaskeleinen, K. Szelezniak, M. Valin, I. Winter, M.
Copyright Year	1963
Abstract	CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive solution for high precision tracking of minimum ionizing particles. In these devices, a thin, moderately doped, undepleted silicon layer is used as the active detector volume with the readout electronics implemented on top of it. Recently, a new MAPS prototype was fabricated using the AMS 0.35 mum OPTO process, featuring a thick epitaxial layer. A systematic study of tracking performance of that prototype using high-energy particle beam is presented in this work. Noise performance, signal amplitude from minimum ionizing particles, detection efficiency, spurious hit suppression and spatial resolution are shown as a function of the readout pitch and the charge collecting diode size. A test array with a novel readout circuitry was also fabricated and tested. Each pixel circuit consists of a front-end voltage amplifier, capacitively coupled to the charge collecting diode, followed by two analog memory cells. This architecture implements an on-pixel correlated double sampling method, allowing for optimization of integration independently of full frame readout time and strongly reduces the pixel-to-pixel output signal dispersion. First measurements using this structure are also presented
Sponsorship	IEEE Nuclear and Plasma Sciences Society Computer Applications in Nuclear and Plasma Sciences (CANPS) Lawrence Berkeley Lab. Lawrence Livermore Nat. Lab. APS College of William and Mary Continuous Electron Beam Accelerator Facility NASA Defence Nuclear Agency Sandia National Laboratories Jet Propulsion Laboratory Brookhaven Nat. Lab. Lawrence Livermore Nat. Lab IEEE/NPPS Radiat. Effects Committee Defence Nuclear Agency/DoD Sandia National Laboratories/DOE Jet Propulsion Laboratory/NASA Phillips Lab./DoD
Starting Page	284
Ending Page	289
Page Count	6
File Size	820708
File Format	PDF
ISSN	00189499
Volume Number	54
Issue Number	1
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-02-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuit testing Particle tracking Prototypes Diodes Silicon Detectors Readout electronics Epitaxial layers Particle beams Circuit noise tracking CMOS monolithic pixel
Content Type	Text
Resource Type	Article
Subject	Nuclear and High Energy Physics Electrical and Electronic Engineering Nuclear Energy and Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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