NDLI: Low-Temperature Sintered Nanoscale Silver as a Novel Semiconductor Device-Metallized Substrate Interconnect Material

Content Provider	IEEE Xplore Digital Library
Author	Bai, J.G. Zhiye Zach Zhang Calata, J.N. Guo-Quan Lu
Copyright Year	1999
Abstract	A nanoscale silver paste containing 30-nm silver particles that can be sintered at 280degC was made for interconnecting semiconductor devices. Sintering of the paste produced a microstructure containing micrometer-size porosity and a relative density of around 80%. Electrical and thermal conductivities of around 2.6times10⁵ (Omegamiddotcm)^-1 and 2.4W/K-cm, respectively, were obtained, which are much higher than those of the solder alloys that are currently used for die attachment and/or flip-chip interconnection of power semiconductor devices. The sintered porous silver had an apparent elastic modulus of about 9GPa, which is substantially lower than that of bulk silver, as well as most solder materials. The lower elastic modulus of the porous silver may be beneficial in achieving a more reliable joint between the device and substrate because of increased compliance that can better accommodate stress arising from thermal expansion mismatch
Sponsorship	IEEE Components, Packaging, and Manufacturing Technology Society
Starting Page	589
Ending Page	593
Page Count	5
File Size	1189689
File Format	PDF
ISSN	15213331
Volume Number	29
Issue Number	3
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-09-01
Publisher Place	U.S.A.
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Nanoscale devices Silver Substrates Semiconductor materials Thermal conductivity Thermal stresses Conducting materials Nanostructured materials Semiconductor devices Microstructure sintered Elastic modulus nanoscale silver paste
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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