NDLI: Recovery of the NBTI-Stressed Ultrathin Gate p-MOSFET: The Role of Deep-Level Hole Traps

Content Provider	IEEE Xplore Digital Library
Author	Ang, D.S. Wang, S.
Copyright Year	1980
Abstract	Under a static negative-bias temperature stress, the negative threshold-voltage V_t shift (extracted from the dc current-voltage characteristic) of the direct-tunneling gate p-MOSFET is found to be substantially larger than that calculated based on the interface-state density measured using the charge-pumping method. Device-recovery characteristics from bipolar gate stress show that interface states alone cannot entirely account for the V_t shift, and indicate that a substantial number of positive oxide charges are also generated during stress. Stability of the increased V_t shift under a negative dc gate biasing and unipolar ac gate pulsing implies that these positive charges are deep-level hole traps with energy states above the Si conduction band edge. Because the defect states are outside the energy window of direct electron tunneling, their long relaxation time plays an important role in the slow recovery transient of the p-MOSFET
Sponsorship	IEEE Electron Devices Society
Starting Page	914
Ending Page	916
Page Count	3
File Size	140702
File Format	PDF
ISSN	07413106
Volume Number	27
Issue Number	11
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-11-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	MOSFET circuits Temperature Current-voltage characteristics Density measurement Current measurement Stress measurement Charge pumps Interface states Character generation Stability oxynitride Hole traps interface traps negative-bias temperature instability (NBTI) nitrided oxide
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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Observation of suppressed interface state relaxation under positive gate biasing of the ultrathin oxynitride gate p-MOSFET subjected to negative-bias temperature stressing

Insight Into the Suppressed Recovery of NBTI-Stressed Ultrathin Oxynitride Gate pMOSFET

A Consistent Deep-Level Hole Trapping Model for Negative Bias Temperature Instability

Effects of Interface States and Positive Charges on NBTI in Silicon-Oxynitride p-MOSFETs

On the Formation of Positive Charges in Ultrathin Silicon-Oxynitride p-MOSFETs Subjected to Negative Bias Temperature Stress

A Common Framework of NBTI Generation and Recovery in Plasma-Nitrided SiON p-MOSFETs

Interface trap passivation effect in NBTI measurement for p-MOSFET with SiON gate dielectric

Effect of Nitrogen on the Frequency Dependence of Dynamic NBTI-Induced Threshold-Voltage Shift of the Ultrathin Oxynitride Gate P-MOSFET

Characteristics of as-grown hole trapping in silicon oxynitride p-MOSFETs subjected to negative bias temperature stress

Recovery of the NBTI-Stressed Ultrathin Gate p-MOSFET: The Role of Deep-Level Hole Traps

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