NDLI: A new lossy substrate de-embedding method for sub-100 nm RF CMOS noise extraction and modeling

Content Provider	IEEE Xplore Digital Library
Author	Jyh-Chyurn Guo Yi-Min Lin
Copyright Year	1963
Abstract	A new equivalent circuit method is proposed in this paper to de-embed the lossy substrate and lossy pads' parasitics from the measured RF noise of multifinger MOSFETs with aggressive gate length scaling down to 80 nm. A new RLC network model is subsequently developed to simulate the lossy substrate and lossy pad effect. Good agreement has been realized between the measurement and simulation in terms of S-parameters and four noise parameters, NF/sub min/ (minimum noise figure), R/sub n/ (noise resistance), Re(Y/sub sopt/), and Im(Y/sub sopt/) for the sub-100-nm RF nMOS devices. The intrinsic NF/sub min/ extracted by the new de-embedding method reveal that NF/sub min/ at 10 GHz can be suppressed to below 0.8 dB for the 80-nm nMOS attributed to the advancement of f/sub T/ to 100-GHz level and the effectively reduced gate resistance by multifinger structure.
Sponsorship	IEEE Electron Devices Society
Starting Page	339
Ending Page	347
Page Count	9
File Size	966210
File Format	PDF
ISSN	00189383
Volume Number	53
Issue Number	2
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-02-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	CMOS integrated circuits MOSFETs Equivalent circuits Integrated circuit modeling Integrated circuit noise substrate De-embedding noise pad RF CMOS
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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