NDLI: TCG-S: orthogonal coupling of P/sup */-admissible representations for general floorplans

Content Provider	IEEE Xplore Digital Library
Author	Jai-Ming Lin Yao-Wen Chang
Copyright Year	1982
Abstract	In this paper, we extend the concept of the P-admissible floorplan representation to that of the P/sup /-admissible one. A P/sup /-admissible representation can model the most general floorplans. Each of the currently existing P/sup /-admissible representations, sequence pair (SP), bounded-slicing grid, and transitive closure graph (TCG), has its strengths as well as weaknesses. We show the equivalence of the two most promising P/sup /-admissible representations, TCG and SP, and integrate TCG with a packing sequence (part of SP) into a representation, called TCG-S. TCG-S combines the advantages of SP and TCG and at the same time eliminates their disadvantages. With the property of SP, a fast packing scheme is possible. Inherited nice properties from TCG, the geometric relations among modules are transparent to TCG-S (implying faster convergence to a desired solution), placement with position constraints becomes much easier, and incremental update for cost evaluation can be realized. These nice properties make TCG-S a superior representation which exhibits an elegant solution structure to facilitate the search for a desired floorplan/placement. Extensive experiments show that TCG-S results in the best area utilization, wirelength optimization, convergence speed, and stability among existing works and is very flexible in handling placement with special constraints.
Sponsorship	IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society
Starting Page	968
Ending Page	980
Page Count	13
File Size	908031
File Format	PDF
ISSN	02780070
Volume Number	23
Issue Number	6
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-06-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Costs Very large scale integration Constraint optimization Circuit stability Design optimization Timing Solid modeling Tree graphs Performance evaluation Polynomials
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software

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TCG-S: orthogonal coupling of P*-admissible representations for general floorplans

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