NDLI: Impact of lateral asymmetric channel doping on deep submicrometer mixed-signal device and circuit performance

Content Provider	IEEE Xplore Digital Library
Author	Narasimhulu, K. Sharma, D.K. Rao, V.R.
Copyright Year	1963
Abstract	In this paper, we have systematically investigated the effect of scaling on analog performance parameters in lateral asymmetric channel (LAC) MOSFETs and compared their performance with conventional (CON) MOSFETs for mixed-signal applications. Our results show that, in LAC MOSFETs, there is significant improvement in the intrinsic device performance for analog applications (such as device gain, gm/I/sub D/ etc.) down to the 70-nm technology node, in addition to an improvement in drive current and other parameters over a wide range of channel lengths. A systematic comparison on the performance of amplifiers and CMOS inverters with CON and LAC MOSFETs is also performed. The tradeoff between power dissipation and device performance is explored with detailed circuit simulations for both CON and LAC MOSFETs.
Sponsorship	IEEE Electron Devices Society
Starting Page	2481
Ending Page	2489
Page Count	9
File Size	574410
File Format	PDF
ISSN	00189383
Volume Number	50
Issue Number	12
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-12-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	MOSFETs Semiconductor device doping Mixed analog-digital integrated circuits CMOS integrated circuits
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Evaluation of the impact of layout on device and analog circuit performance with lateral asymmetric channel MOSFETs

Impact of Lateral Asymmetric Channel Doping on Deep Submicrometer Mixed-Signal Device and Circuit Performance

Impact of Halo Doping on the Subthreshold Performance of Deep-Submicrometer CMOS Devices and Circuits for Ultralow Power Analog/Mixed-Signal Applications

The effect of LAC doping on deep submicrometer transistor capacitances and its influence on device RF performance

Analog, Mixed-Signal, and RF Circuit Design in Nanometer CMOS

Channel engineering for analog device design in deep submicron CMOS technology for system on chip applications

A deep-submicrometer microwave/digital CMOS/SOS technology

CMOS analog integrated circuits based on weak inversion operations

Comparative study of fully depleted and body-grounded non fully depleted SOI MOSFETs for high performance analog and mixed signal circuits

Impact of lateral asymmetric channel doping on deep submicrometer mixed-signal device and circuit performance

Similar Documents

Evaluation of the impact of layout on device and analog circuit performance with lateral asymmetric channel MOSFETs

Impact of Lateral Asymmetric Channel Doping on Deep Submicrometer Mixed-Signal Device and Circuit Performance

Impact of Halo Doping on the Subthreshold Performance of Deep-Submicrometer CMOS Devices and Circuits for Ultralow Power Analog/Mixed-Signal Applications

The effect of LAC doping on deep submicrometer transistor capacitances and its influence on device RF performance

Analog, Mixed-Signal, and RF Circuit Design in Nanometer CMOS

Channel engineering for analog device design in deep submicron CMOS technology for system on chip applications

A deep-submicrometer microwave/digital CMOS/SOS technology

CMOS analog integrated circuits based on weak inversion operations

Comparative study of fully depleted and body-grounded non fully depleted SOI MOSFETs for high performance analog and mixed signal circuits

Impact of lateral asymmetric channel doping on deep submicrometer mixed-signal device and circuit performance