NDLI: 110-GB/s simultaneous bidirectional transceiver logic synchronized with a system clock

Content Provider	IEEE Xplore Digital Library
Author	Takahashi, T. Muto, T. Shirai, Y. Shirotori, F. Takada, Y. Yamagiwa, A. Nishida, A. Hotta, A. Kiyuna, T.
Copyright Year	1966
Abstract	A simultaneous bidirectional transceiver logic (SBTL), for a 0.25 /spl mu/m CMOS embedded array, has a low-voltage-swing input flip-flop circuit and an output flip-flop with a boundary scan to enable a 1.1-Gb/s data transfer per LSI pin with a 550-MHz system clock. Clock skew and jitter minimization enables high bandwidth in a phase-locked system. Measured latency time for transmission is less than 3.0 ns during simultaneous switching mode when the cable length is 18 cm. Average power consumption is 12 mW per pin at 550 MHz. A low-noise output buffer and a controlled collapse chip connection (C4)-based 1595-pin package with on-package capacitors achieve 100-byte data bus. The maximum data bandwidth per LSI is 110 GB/s.
Sponsorship	IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE
Starting Page	1526
Ending Page	1533
Page Count	8
File Size	559398
File Format	PDF
ISSN	00189200
Volume Number	34
Issue Number	11
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1999-11-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Transceivers CMOS logic circuits Logic arrays Flip-flops Large scale integration Clocks Bandwidth Synchronization Jitter Minimization
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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