NDLI: 4H-SiC MOSFETs utilizing the H<sub>2</sub> surface cleaning technique

Content Provider	IEEE Xplore Digital Library
Author	Ueno, K. Asai, R. Tsuji, T.
Copyright Year	1980
Abstract	The H/sub 2/ cleaning technique was examined as the precleaning of the gate oxidation for 4H-SiC MOSFETs. The device had a channel width and length of 150 and 100 /spl mu/m, fabricated on the p-type epitaxial layer of 3/spl times/10/sup 16/ cm/sup -3/. The gate oxidation was performed after the conventional RCA cleaning, and H/sub 2/ annealing at 1000/spl deg/C. The obtained channel mobility depends on the pre-cleaning process strongly, and was achieved 20 cm/sup 2//N s in the H/sub 2/ annealed sample. The effective interface-state density was also measured by the MOS capacitors fabricated on the same chips, resulting 1.8/spl times/10/sup 12/ cm/sup -2/ from the photo-induced C-V method.
Sponsorship	IEEE Electron Devices Society
Starting Page	244
Ending Page	246
Page Count	3
File Size	55468
File Format	PDF
ISSN	07413106
Volume Number	19
Issue Number	7
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-07-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	MOSFET circuits Hydrogen Surface cleaning Annealing Oxidation Silicon carbide Semiconductor device measurement MOS capacitors Hafnium Fabrication
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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4H-SiC MOSFETs utilizing the H₂ surface cleaning technique