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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Hokanson, K.E. Bar-Cohen, A. |
| Copyright Year | 1994 |
| Abstract | In low-cost integrated circuit (IC) packaging, a thin layer of adhesive is often used to bond the die to a leadframe or substrate. Because of the poor thermal conductivity of the adhesive, a thick layer will result in elevated chip temperatures. However, due to the differential expansion between the silicon and metal, a thin layer will result in high shear stress, in the adhesive, and along the bonded surfaces. In this study, first order thermal and thermostructural analytical relations for shear stress are used to determine the appropriate thickness of the adhesive layer between a die and a leadframe paddle, as encountered in PDIP packages. Numerical simulation, with finite element (FE) models, is used to examine the assumptions underpinning the analytical relations and to verify the analytical results. Using a filled-epoxy with an adhesion strength of 25 MPa, adhesive layer thicknesses between 0.027 and 0.2 mm are found to be suitable for this application. Assuming equal loss of reliability, due to chip temperature increases and shear stress increases, an optimum die-bond thickness of 0.16 mm is found. The FE computations appear to support the assumption that elevated shear stress is the most likely cause of die-bond structural failure for this subject package.< |
| Sponsorship | Ericsson IEEE Components, Packaging and Manufacturing Technology Society |
| Starting Page | 578 |
| Ending Page | 584 |
| Page Count | 7 |
| File Size | 644243 |
| File Format | |
| ISSN | 10709886 |
| Volume Number | 18 |
| Issue Number | 3 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1995-09-01 |
| Publisher Place | U.S.A. |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Microassembly Thermal stresses Bonding Thermal conductivity Temperature Integrated circuit packaging Silicon Numerical simulation Finite element methods Adhesives |
| Content Type | Text |
| Resource Type | Article |
| Subject | Engineering |
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