NDLI: Test generation for data-path logic: the F-path method

Content Provider	IEEE Xplore Digital Library
Author	Freeman, S.
Copyright Year	1966
Abstract	Tests for data-path logic can be generated with the aid of high-level methods that utilize the presence of special forms of sensitized paths. These paths, called fault paths (F-paths), are defined so that they transmit fault information with certainty. Their presence can be determined from the functional definition of a block, and when, exceptionally, they are absent, a minimum hardware addition usually suffices to provide them. They permit use of powerful, computer-aided test generation methods that have permitted routine targeting of 100% coverage of an expanded fault set (more than just stuck-ats), verification of success by simple postprocessing of RTL (resistor-transistor logic)-level good-logic simulation.<>
Sponsorship	IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE
Starting Page	421
Ending Page	427
Page Count	7
File Size	846129
File Format	PDF
ISSN	00189200
Volume Number	23
Issue Number	2
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1988-04-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic testing Hardware Power generation Computational modeling Computer simulation
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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