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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Carlac'h, J.-C. Penard, P. Quenard, P. Renou, P. Sicre, J.-L. |
| Copyright Year | 1966 |
| Abstract | The design and implementation of a digital video application-specific integrated circuit (ASIC) that performs the line interpolation of the missing color samples of a digitized multiplex analog component (MAC) video signal are described. The main part of this circuit is a specific 864*8-bit memory designed as a double-chroma digital delay line. The design is based on 2- mu m double-metal N-well CMOS technology. The chip area is 35.6 mm/sup 2/ and it operates with a clock rate of 13.5 MHz. This circuit, which also performs phasing and blanking of the 8-bit digitized luminance and chrominance samples, is a part of a digital decoder used for the reception of video TV signals coded according to the MAC family system.< |
| Sponsorship | IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE |
| Starting Page | 621 |
| Ending Page | 624 |
| Page Count | 4 |
| File Size | 483270 |
| File Format | |
| ISSN | 00189200 |
| Volume Number | 23 |
| Issue Number | 3 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1988-06-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Interpolation Chromium Blanking Application specific integrated circuits Clocks CMOS digital integrated circuits CMOS technology Frequency Signal design Integrated circuit technology |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering |
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