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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ruden, P.P. Daniels, R.R. Shur, M.S. Grider, D. Nohava, T. Arch, D.K. Cirillo Jr., N.C. |
| Copyright Year | 1963 |
| Abstract | The low extrinsic transconductance of the p-channel self-aligned gate heterostructure insulated gate FETs (HIGFETs), resulting from low hole mobility and high source resistance, has limited the performance of these devices. Results are presented for such devices fabricated on an AlGaAs/InGaAs/GaAs strained quantum-well structure. Transconductance, transconductance parameter, and maximum drain current as high as 113 mS/mm, 305 mS/V/mm, and 94 mA/mm, respectively, were achieved in 0.8- mu m devices at room temperature. At 77 K 181 mS/mm, 800 mS/V/mm, and 180 mA/mm, respectively, were obtained in 1- mu m devices. The highest hole field effect mobilities deduced from the device data are 860 and 2815 cm/sup 2//V at room temperature and 77 K, respectively. These device parameters are believed to be the best reported to date, suggesting that a viable complementary heterostructure FET technology based on this structure can be realized.< |
| Sponsorship | IEEE Electron Devices Society |
| Starting Page | 2440 |
| File Size | 151731 |
| File Format | |
| ISSN | 00189383 |
| Volume Number | 35 |
| Issue Number | 12 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1988-12-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Indium gallium arsenide Gallium arsenide FETs Transconductance Temperature Signal processing Laboratories Digital circuits Insulation Logic circuits |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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