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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Gongwer, G.S. Gudger, K.H. |
| Copyright Year | 1966 |
| Description | A new LSI memory redundancy technique using E/SUP 2/PROM cells as the programmable element has been developed. Yield enhancement with this technique has been demonstrated using two redundant rows on a 16K E/SUP 2/PROM chip. This paper describes the structure and operation of the circuit blocks used, and how these circuits interface with the memory chip to produce the observed yield enhancement. The method for programming the redundancy elements is described, along with circuit advantages and capabilities unique to E/SUP 2/PROM redundancy. Device performance and yield enhancement for the 16K E/SUP 2/PROM are summarized. |
| Sponsorship | IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE |
| Starting Page | 550 |
| Ending Page | 553 |
| Page Count | 4 |
| File Size | 621262 |
| File Format | |
| ISSN | 00189200 |
| Volume Number | 18 |
| Issue Number | 5 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1983-10-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | PROM Redundancy Fuses Computer aided manufacturing CADCAM Circuit testing EPROM Passivation Packaging System testing |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering |
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