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Network-attached solid-state recorder architecture
| Content Provider | NASA Technical Reports Server (NTRS) |
|---|---|
| Author | Cox, Brian |
| Copyright Year | 2008 |
| Description | A document discusses placing memory modules on the high-speed serial interconnect, which is used by a spacecraft s computer elements for inter-processor communications, to allow all multiple computer system architectures to access the spacecraft data storage at the same time. Each memory board is identical electrically and receives its bus ID upon connection to the system. The computer elements are configured in a similar fashion. The architecture allows for multiple memory boards to be accessed simultaneously by different computer elements, and results in a scalable, strong, fault-tolerant system. The IEEE-1393 ring bus can be routed so that multiple card failures can occur and the mass memory storage will still function. |
| File Size | 134171 |
| Page Count | 1 |
| File Format | |
| Alternate Webpage(s) | http://archive.org/details/NASA_NTRS_Archive_20080047219 |
| Archival Resource Key | ark:/13960/t43r5v17g |
| Language | English |
| Publisher Date | 2008-11-01 |
| Access Restriction | Open |
| Subject Keyword | Computer Operations And Hardware Airborne/spaceborne Computers Distributed Processing Architecture Computers Memory Computers Computer Systems Design Computer Components Ntrs Nasa Technical Reports Server (ntrs) Nasa Technical Reports Server Aerodynamics Aircraft Aerospace Engineering Aerospace Aeronautic Space Science |
| Content Type | Text |
| Resource Type | Technical Report |
