NDLI: Massively parallel processor computer

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Massively parallel processor computer

Content Provider	NASA Technical Reports Server (NTRS)
Copyright Year	1983
Description	An apparatus for processing multidimensional data with strong spatial characteristics, such as raw image data, characterized by a large number of parallel data streams in an ordered array is described. It comprises a large number (e.g., 16,384 in a 128 x 128 array) of parallel processing elements operating simultaneously and independently on single bit slices of a corresponding array of incoming data streams under control of a single set of instructions. Each of the processing elements comprises a bidirectional data bus in communication with a register for storing single bit slices together with a random access memory unit and associated circuitry, including a binary counter/shift register device, for performing logical and arithmetical computations on the bit slices, and an I/O unit for interfacing the bidirectional data bus with the data stream source. The massively parallel processor architecture enables very high speed processing of large amounts of ordered parallel data, including spatial translation by shifting or sliding of bits vertically or horizontally to neighboring processing elements.
File Size	1282199
Page Count	15
File Format	PDF
Alternate Webpage(s)	http://archive.org/details/NASA_NTRS_Archive_19830017107
Archival Resource Key	ark:/13960/t0dv6cd0b
Language	English
Publisher Date	1983-04-12
Access Restriction	Open
Subject Keyword	Computer Operations And Hardware Logical Elements Image Processing Random Access Memory Airborne/spaceborne Computers Massively Parallel Processors Shift Registers Architecture Computers Parallel Processing Computers Computer Design Ntrs Nasa Technical Reports Server (ntrs) Nasa Technical Reports Server Aerodynamics Aircraft Aerospace Engineering Aerospace Aeronautic Space Science
Content Type	Text
Resource Type	Patent

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