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Electrically reconfigurable logic array
| Content Provider | NASA Technical Reports Server (NTRS) |
|---|---|
| Author | Agarwal, R. K. |
| Copyright Year | 1982 |
| Description | To compose the complicated systems using algorithmically specialized logic circuits or processors, one solution is to perform relational computations such as union, division and intersection directly on hardware. These relations can be pipelined efficiently on a network of processors having an array configuration. These processors can be designed and implemented with a few simple cells. In order to determine the state-of-the-art in Electrically Reconfigurable Logic Array (ERLA), a survey of the available programmable logic array (PLA) and the logic circuit elements used in such arrays was conducted. Based on this survey some recommendations are made for ERLA devices. |
| File Size | 518328 |
| Page Count | 14 |
| File Format | |
| Alternate Webpage(s) | http://archive.org/details/NASA_NTRS_Archive_19830009089 |
| Archival Resource Key | ark:/13960/t6m08xw1c |
| Language | English |
| Publisher Date | 1982-08-01 |
| Access Restriction | Open |
| Subject Keyword | Computer Operations And Hardware Surveys Central Processing Units Algorithms Pipelining Computers Logic Circuits Interprocessor Communication Ntrs Nasa Technical Reports Server (ntrs) Nasa Technical Reports Server Aerodynamics Aircraft Aerospace Engineering Aerospace Aeronautic Space Science |
| Content Type | Text |
| Resource Type | Article |
