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A high performance multiplier processor for use with aerospace microcomputers
| Content Provider | NASA Technical Reports Server (NTRS) |
|---|---|
| Author | Pierce, P. E. |
| Copyright Year | 1980 |
| Description | An MC68000 based microcomputer including a hardware multiplier processor has been designed and prototyped for a reentry vehicle navigation and control application. In this paper, the microcomputer is discussed with emphasis on the multiplier processor architecture, software control and theory of operation. |
| File Size | 205069 |
| Page Count | 8 |
| File Format | |
| Alternate Webpage(s) | http://archive.org/details/NASA_NTRS_Archive_19810003161 |
| Archival Resource Key | ark:/13960/t0qr9ms6z |
| Language | English |
| Publisher Date | 1980-01-01 |
| Access Restriction | Open |
| Subject Keyword | Computer Operations And Hardware Multipliers Logic Circuits Navigation Aids Microcomputers Reentry Vehicles Control Units Computers Central Processing Units Architecture Computers Computer Storage Devices Ntrs Nasa Technical Reports Server (ntrs) Nasa Technical Reports Server Aerodynamics Aircraft Aerospace Engineering Aerospace Aeronautic Space Science |
| Content Type | Text |
| Resource Type | Technical Report |
