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TRIPTYCH: A New FPGA Architecture (1991)
| Content Provider | CiteSeerX |
|---|---|
| Author | Hauck, Scott A. Song, David Borriello, Gaetano Walkup, Elizabeth A. Elizabeth, David Song Ebeling, Carl |
| Abstract | Existing FPGA architectures can be classified along two dimensions: reprogrammable vs. one-time programmable and general-purpose vs. domain specific. The most challenging class of FPGA architectures to design is the reprogrammable, general-purpose FPGA, of which Xilinx is the most wellknown example. In this paper we describe Triptych, a new FPGA architecture that addresses two problems of current reprogrammable FPGAs: the large delays incurred in composing large functions and the strict division between routing and logic resources. Our studies indicate that Triptych is more areaefficient than current architectures and has comparable delay characteristics for a large range of circuits that include both data-path elements and control logic. INTRODUCTION The most common approach to field-programmable gate array architectures is to dedicate a portion of the total chip area to logic functions and the remainder to interconnection resources. The logic functions may be fixed or programmable, ... |
| File Format | |
| Publisher Date | 1991-01-01 |
| Access Restriction | Open |
| Subject Keyword | General-purpose V Current Reprogrammable Fpgas Fpga Architecture Control Logic Interconnection Resource Wellknown Example Comparable Delay Characteristic Reprogrammable V Total Chip Area Strict Division Large Function Data-path Element Common Approach Challenging Class Large Range Logic Function Large Delay Logic Resource Field-programmable Gate Array Current Architecture General-purpose Fpga New Fpga Architecture |
| Content Type | Text |
| Resource Type | Article |
