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Low Power Data Format Converter Design Using Semi-Static Register Allocation (1995)
| Content Provider | CiteSeerX |
|---|---|
| Author | Srivatsan, Kala Chakrabarti, Chaitali Lucke, Lori |
| Description | In many applications, such as digital signal processing, data format converters are used to reformat the data transferred between processing modules. In VLSI implementations, these converters consume a large portion of the available resources. Various methods have been proposed to synthesize data format converter architectures while optimizing the number of registers used to store the data. In this paper, we present a new register allocation scheme which not only minimizes the number of registers, but also minimizes the power consumption in the data format converter. Low power data format converters are synthesized by minimizing the transitions and interconnections between the registers used to store the data. We present both a heuristic and an integer linear programming formulation to solve the allocation problem. Our method shows significant improvement over previous techniques. 1 Introduction Data format converters (DFCs) are used to permute the data from one format to another in ... Proc. of ICCD |
| File Format | |
| Language | English |
| Publisher Date | 1995-01-01 |
| Access Restriction | Open |
| Subject Keyword | Low Power Data Format Converter Digital Signal Processing Significant Improvement Converter Architecture New Register Allocation Scheme Many Application Vlsi Implementation Introduction Data Format Converter Data Format Converter Large Portion Power Consumption Allocation Problem Previous Technique Various Method Available Resource |
| Content Type | Text |
| Resource Type | Article |
