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Loop Scheduling Algorithm for Timing and Memory Operation Minimization with Register Constraint (1998)
| Content Provider | CiteSeerX |
|---|---|
| Author | Chen, Fei Tongsima, Sissades Sha, Edwin H. -M. |
| Description | Loop pipelining is a scheduling technique widely used to improve the performance of systems running scientific applications, such as multimedia and DSP systems. These applications usually contain repetitive groups of operations represented by nested loops, categorized by multidimensional systems. Considerable research has been conducted to produce high throughput schedules under resource constraint. Nevertheless, unlimited number of registers were assumed in these studies. In this paper, we present a novel scheduling framework, called Memory Operation minimization Rotation Scheduling (MORS), for scheduling multi-dimensional applications under register constraint and other resource constraint. Keeping on satisfying the register constraint, MORS incrementally compacts the schedule to achieve a high throughput schedule. Moreover, this methodology strives to shorten the schedule length while minimally inserting the load and store operations in the schedule to reduce the register requireme... |
| File Format | |
| Language | English |
| Publisher Date | 1998-01-01 |
| Publisher Institution | In Proceedings of SiP’98 |
| Access Restriction | Open |
| Subject Keyword | Register Constraint Schedule Length Considerable Research Repetitive Group Memory Operation Minimization Dsp System Nested Loop Resource Constraint Memory Operation Minimization Rotation Scheduling Multidimensional System Multi-dimensional Application Store Operation Loop Pipelining Scheduling Technique Novel Scheduling Framework Scientific Application Register Requireme High Throughput Schedule Loop Scheduling Algorithm Unlimited Number |
| Content Type | Text |
| Resource Type | Article |
