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Register-constrained Loop Scheduling for Optimizing Time and Memory Operations (1998)
| Content Provider | CiteSeerX |
|---|---|
| Author | Chen, Fei Sha, Edwin H. -M. Tongsima, Sissades |
| Abstract | Loop pipelining is a scheduling technique widely used to improve the performance of systems running scientific applications, such as multimedia and DSP systems. These applications usually contain repetitive groups of operations represented by nested loops, categorized by multidimensional systems. Considerable research has been conducted to produce high throughput schedules under resource constraint. Nevertheless, unlimited number of registers were assumed in these studies. In this paper, we present a novel scheduling framework, called Memory Operation minimization Rotation Scheduling (MORS), for scheduling multi-dimensional applications subject to register constraint and other resource constraints. Under such constraints, MORS strives to shorten the schedule length while minimally inserting the load and store operations in the schedule to reduce the register requirement pressure. Experiments show that our approach is useful for reducing the schedule length without violating the registe... |
| File Format | |
| Journal | Proceedings of the IEEE Workshop on Signal Processing Systems (SiPS |
| Publisher Date | 1998-01-01 |
| Access Restriction | Open |
| Subject Keyword | Considerable Research Schedule Length Repetitive Group Nested Loop Dsp System Resource Constraint Multidimensional System Memory Operation Minimization Rotation Scheduling Multi-dimensional Application Register Requirement Pressure Loop Pipelining Store Operation Scheduling Technique Novel Scheduling Framework Scientific Application Memory Operation Register-constrained Loop Scheduling High Throughput Schedule Unlimited Number Optimizing Time |
| Content Type | Text |
| Resource Type | Proceeding Conference Proceedings |
