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A topology design customization approach for STNoC
| Content Provider | CiteSeerX |
|---|---|
| Author | Palermo, Gianluca |
| Description | To support high bandwidth SoCs, a communication design flow is necessary for the design space exploration respecting tight design requirements. In order to exploit the benefits introduced by the NoC approach for the on-chip communication, the paper presents a design flow for the core mapping and customization of the net-work topology applied to STNoC, the Network on-Chip developed by STMicroelectronics. Starting from ring topology, the proposed application-specific flow tries to find a set of customized topolo-gies, optimized in terms of performance and area/energy overhead, by adding links. The generated STNoC custom topologies provide a reduced cost with respect to the spidergon topology. 1. |
| File Format | |
| Language | English |
| Publisher Institution | In Nano-Nets 07, in proceedings of 2nd International Conference on Nano-Networks (Nano-Nets 2007 |
| Access Restriction | Open |
| Subject Keyword | On-chip Communication Tight Design Requirement Reduced Cost Area Energy Overhead Spidergon Topology Communication Design Flow Core Mapping Net-work Topology Design Space Exploration Application-specific Flow Try Network On-chip Developed Generated Stnoc Custom Topology Customized Topolo-gies Noc Approach Topology Design Customization Approach Design Flow High Bandwidth Socs |
| Content Type | Text |
| Resource Type | Article |
