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Workshop on the intersections of computer architecture and reconfigurable logic (carl 2012): category 2 a stall-free real-time garbage collector for fpgas.
| Content Provider | CiteSeerX |
|---|---|
| Author | Bacon, David F. Cheng, Perry Shukla, Sunil |
| Abstract | Programmers are turning to diverse architectures such as reconfigurable hardware (FPGAs) to achieve performance. But such systems are far more complex to use than conventional CPUs. The continued exponential increase in transistors, combined with the desire to implement ever more sophisticated algorithms, makes it imperative that such systems be programmed at much higher levels of abstraction. One fundamental high-level language features is automatic memory management in the form of garbage collection. We present the first implementation of a complete garbage collector in hardware (as opposed to previous “hardware-assist ” techniques), using an FPGA and its on-chip memory. Using a completely concurrent snapshot algorithm, it provides single-cycle access to the heap, and never stalls the mutator for even a single cycle. We have synthesized the collector to hardware and show that it never consumes more than 1 % of the logic resources of a high-end FPGA. For comparison we also implemented explicit (malloc/free) memory management, and show that our collector is between 4% to 17 % slower than malloc, with comparable energy consumption. Surprisingly, in hardware real-time collection is superior to stopthe-world collection on every performance axis, and even for stressful micro-benchmarks can achieve 100 % MMU with heaps as small as 1.01 to 1.4 times the absolute minimum. This reprises work previously published in PLDI [2]. 1. |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Computer Architecture Stall-free Real-time Garbage Collector Reconfigurable Logic Performance Axis Conventional Cpu First Implementation Stressful Micro-benchmarks Complete Garbage Collector Hardware Real-time Collection Fundamental High-level Language Feature Logic Resource Single Cycle Garbage Collection Continued Exponential Increase High-end Fpga Single-cycle Access Concurrent Snapshot Algorithm Reconfigurable Hardware Stopthe-world Collection On-chip Memory Automatic Memory Management Absolute Minimum Previous Hardware-assist Technique Comparable Energy Consumption Memory Management Sophisticated Algorithm |
| Content Type | Text |
