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Functional Retiming: A New Approach to Sequential Synthesis and Optimization (1996)
| Content Provider | CiteSeerX |
|---|---|
| Author | Ciesielski, Maciej J. |
| Abstract | Retiming is an optimization technique for cycle-time minimization of synchronous sequential circuits [1, 2]. It is based on modifying the sequential structure of the circuits by relocating the state registers across logic gates, without affecting the underlying combinational logic. Due to a number of attractive features, such as relative simplicity, low computational complexity, and preservation of testability [5], it has become a common practice in industry. However, its possibilities for a significant circuit optimization are limited. First of all retiming is a purely structural transformation technique, typically applied to gate-level circuits. Secondly, since it does not affect the combinational logic component of the circuit, it has very limited potential for the optimization by resynthesis. Such an optimization can be only applied to logic blocks within register boundaries. (The only exception to that is peripheral retiming which considers glob |
| File Format | |
| Language | English |
| Publisher Date | 1996-01-01 |
| Access Restriction | Open |
| Subject Keyword | Sequential Synthesis New Approach Functional Retiming Relative Simplicity Gate-level Circuit Sequential Structure Significant Circuit Optimization Structural Transformation Technique Underlying Combinational Logic Combinational Logic Component Low Computational Complexity Limited Potential Optimization Technique Logic Gate Synchronous Sequential Circuit State Register Common Practice Attractive Feature Cycle-time Minimization Register Boundary |
| Content Type | Text |
| Resource Type | Technical Report |
