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High-yield of memory elements from carbon nanotube field-effect transistors with atomic layer deposited gate dielectric (2008).
| Content Provider | CiteSeerX |
|---|---|
| Author | Rinkiö, Marcus Johansson, Andreas Zavodchikova, Marina Y. Nasibulin, Albert G. Törmä, Päivi |
| Abstract | Carbon nanotube field-effect transistors (CNT FETs) have been proposed as possible building blocks for future nano-electronics. But a challenge with CNT FETs is that they appear to randomly display varying amounts of hysteresis in their transfer characteristics. The hysteresis is often attributed to charge trapping in the dielectric layer between the nanotube and the gate. This study includes 94 CNT FET samples, providing an unprecedented basis for statistics on the hysteresis seen in five different CNT-gate configurations. We find that the memory effect can be controlled by carefully designing the gate dielectric in nm-thin layers. By using atomic layer depositions (ALD) of HfO2 and TiO2 in a triple-layer configuration, we achieve the first CNT FETs with consistent and narrowly distributed memory effects in their transfer characteristics. The quasi-one-dimensional, nearly perfect, crystalline structures of CNTs make them promising candidates [1, 2, 3, 4] to extend the down-scaling of electronic components beyond the limitations of present Si-based technology. Featuring either semiconducting or metallic transport properties, they can in principle replace both |
| File Format | |
| Publisher Date | 2008-01-01 |
| Access Restriction | Open |
| Subject Keyword | Carbon Nanotube Field-effect Transistor Memory Element Atomic Layer Deposited Gate Dielectric Cnt Fet Transfer Characteristic Atomic Layer Deposition First Cnt Fet Cnt Fet Sample Unprecedented Basis Triple-layer Configuration Dielectric Layer Memory Effect Nm-thin Layer Field-effect Transistor Present Si-based Technology Distributed Memory Effect Metallic Transport Property Possible Building Block Electronic Component Different Cnt-gate Configuration Crystalline Structure Future Nano-electronics Gate Dielectric |
| Content Type | Text |
