NDLI: An Efficient Bump Pad Design to Mitigate the Flip Chip Package Induced Stress

Content Provider	The American Society of Mechanical Engineers (ASME) Digital Collection
Author	Gonzalez, Mario Vos, Joeri De Plas, Geert Van Der Beyne, Eric
Copyright Year	2015
Abstract	A numerical analysis using Finite Element Models of different stress buffer configurations has been proposed for improving the reliability of solder joints and at the same time decrease the induced stresses in the back-end-of-line (BEOL). A non-underfilled Flip Chip with a silicon die size of 10×10 mm2 mounted on a FR4 board has been used as test vehicle. The die to substrate interconnection is done by using copper pillars and Sn solder with a diameter of 50 μm and a total standoff of 50 μm. The thickness of the passivation, a copper pedestal fabricated as a redistribution I/O pad and a polymeric buffer layer with different geometric configurations were used in combination to minimize the induced stresses in the BEOL and increase the flexibility of the copper pillar interconnections. It was found that a stiff layer below the copper pillar has the major contribution to reduce the stress in the BEOL, while the softer buffer layer minimizes the induced plastic strain in the solder interconnection. Fabrication of the samples with optimal configuration are under progress.
Sponsorship	Electronic and Photonic Packaging Division
File Format	PDF
ISBN	9780791856895
DOI	10.1115/IPACK2015-48111
Volume Number	Volume 2: Advanced Electronics and Photonics, Packaging Materials and Processing; Advanced Electronics and Photonics: Packaging, Interconnect and Reliability; Fundamentals of Thermal and Fluid Transport in Nano, Micro, and Mini Scales
Conference Proceedings	ASME 2015 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems collocated with the ASME 2015 13th International Conference on Nanochannels, Microchannels, and Minichannels
Language	English
Publisher Date	2015-07-06
Publisher Place	San Francisco, California, USA
Access Restriction	Subscribed
Subject Keyword	Solder joints Solders Flip-chip Polishing equipment Stress Vehicles Design Flip-chip packages Finite element model Numerical analysis Tin Silicon Manufacturing Copper Flip-chip devices Reliability Columns (structural)
Content Type	Text
Resource Type	Article

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