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  1. Proceedings of the ACM SIGGRAPH/EUROGRAPHICS conference on Graphics hardware (HWWS '02)
  2. Dependency graph scheduling in a volumetric ray tracing architecture
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Efficient partitioning of fragment shaders for multipass rendering on programmable graphics hardware
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Dependency graph scheduling in a volumetric ray tracing architecture

Content Provider ACM Digital Library
Author Frank, S. Kaufman, A.
Abstract We propose a volumetric ray tracing PCI board which uses FPGA components and on chip memory. In a multiboard system a super volume (i.e., one that is larger than on-board memory) can be either distributed or shared. In a single board system it must be fetched from main memory as needed. In any case the volume is sub-divided into cubic cells and process scheduling has a major impact on the rendering time. There is not generally a scheduling order which would allow each sub-volume to be read from memory only once. We introduce instead a new, compact representation of the cell ray-spawning dependencies of all rays, called Cell Tree. We use this Cell Tree to determine a good processing schedule for the next frame based on the ray dependencies from the previous frame. Experimental results show an average miss reduction of30%. The main contribution of this paper is the generation of a Cell Tree for ray tracing which collects coherent bundles of rays with very little overhead. This is used to decrease overall memory access in sequences where there is good inter-frame coherence.
Starting Page 127
Ending Page 135
Page Count 9
File Format PDF
ISBN 1581135807
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2002-09-01
Publisher Place Goslar
Access Restriction Subscribed
Subject Keyword Inter-frame coherence Super volume Volumetric ray tracing Load balancing
Content Type Text
Resource Type Article
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