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  1. Proceedings of the 7th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 5th Workshop on Design Tools and Architectures For Multicore Embedded Computing Platforms (PARMA-DITAM '16)
  2. Low communication overhead dynamic mapping of multiple HEVC video stream decoding on NoCs
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Stack size estimation on machine-independent intermediate code for OpenCL kernels
Predictive modeling methodology for compiler phase-ordering
Flexible resource allocation and management for application graphs on ReNÉ MPSoC
Low communication overhead dynamic mapping of multiple HEVC video stream decoding on NoCs
Deploying and monitoring hadoop MapReduce analytics on single-chip cloud computer
Runtime resource management for embedded and HPC systems

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Low communication overhead dynamic mapping of multiple HEVC video stream decoding on NoCs

Content Provider ACM Digital Library
Author Mendis, Hashan Roshantha Indrusiak, Leandro Soares
Abstract The High Efficiency Video Coding (HEVC) standard offers several parallelisation tools such as wave-front parallel processing (WPP) and Tiles (independent frame regions) to better manage the computationally expensive workloads on modern multicore/many-core platforms. However, poor allocation of tile-level HEVC decoding tasks to processing elements may result in increased latency and energy consumption due to data-communication overhead between dependent tiles. In this work, we discuss the difficulties in decoding multiple HEVC bitstreams with highly varying resolutions and data-dependency characteristics as seen in HEVC coded video streams with random-access, adaptive group of pictures (GoP) structures. Secondly, in order to address the above challenges, we introduce a runtime tile allocation scheme that help to reduce the energy usage during HEVC decoding. Evaluations against a bin-packing algorithm, show that the proposed workload mapping technique is able to maintain reasonably acceptable latency results, whilst reducing communication overhead (8-10%) and increasing the mean processor idle periods (~30%) to support dynamic power management.
Starting Page 19
Ending Page 24
Page Count 6
File Format PDF
ISBN 9781450340526
DOI 10.1145/2872421.2872422
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2016-01-18
Publisher Place New York
Access Restriction Subscribed
Subject Keyword Noc Dynamic task mapping Hevc Low-communication
Content Type Text
Resource Type Article
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