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| Content Provider | ACM Digital Library |
|---|---|
| Author | Zhu, Weirong del Cuvillo, Juan Gao, Guang |
| Abstract | This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates processing logic (160 thread units), embedded memory (5MB) and communication hardware on the same die. Such a unique architecture presents new opportunities for optimization. Specifically, we consider the following three areas: (1) a memory aware runtime library that places frequently used data structures in scratchpad memory; (2) a unique spin lock algorithm for shared memory synchronization based on in-memory atomic instructions and native support for thread level execution; (3) a fast barrier that directly uses C64 hardware support for collective synchronization. All three optimizations together, result in an 80% overhead reduction for language constructs in OpenMP. We believe that such a drastic reduction in the cost of managing parallelism makes OpenMP more amenable for writing parallel programs on the C64 platform. |
| Starting Page | 41 |
| Ending Page | 50 |
| Page Count | 10 |
| File Format | |
| ISBN | 1595933026 |
| DOI | 10.1145/1128022.1128030 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2006-05-03 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Subject Keyword | Performance evaluation Chip multiprocessor Openmp Run-time system System-on-a-chip |
| Content Type | Text |
| Resource Type | Article |
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