NDLI: Dysource: a high performance and scalable NAND flash controller architecture based on source synchronous interface

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Dysource: a high performance and scalable NAND flash controller architecture based on source synchronous interface

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Dysource: a high performance and scalable NAND flash controller architecture based on source synchronous interface

Content Provider	ACM Digital Library
Author	Liu, Fang Wu, Lizhou Ou, Yang Xiao, Nong Li, Shuo Du, Yimo
Abstract	Flash controllers play critical roles in determining the performance of flash storage. But current controller architectures based on asynchronous interface cannot meet the ever-increasing demands of performance for new large-scale flash storage systems, due to their limitations of I/O bandwidth and scalability. In this paper, we propose an advanced NAND flash controller architecture, called Dysource, to improve performance and scalability of flash storage. Based on the high-speed source synchronous interface supported by ONFI standard, we propose a dynamic scheduling strategy to extend exploration of parallelism to target level. Moreover, we design a novel instruction "MOVE" and incorporate it into existing instruction set to speed up garbage collection for higher performance. The experimental results suggest that the performance of the Dysource controller is 4.6 to 9.4 times better than the traditional asynchronous controller as for organization of 8 channels x 8 targets. Moreover, by employing architecture of multiple Dysources, the storage system can scale to arbitrary number of channels and 32 targets at most per channel with high growth rate of performance.
Starting Page	1
Ending Page	8
Page Count	8
File Format	PDF
ISBN	9781450333580
DOI	10.1145/2742854.2742873
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2015-05-06
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Nand flash Source synchronous interface Storage system Dynamic scheduling
Content Type	Text
Resource Type	Article

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