NDLI: Scalable concurrent and parallel mark

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Scalable concurrent and parallel mark

Content Provider	ACM Digital Library
Author	Gehringer, Edward Wolf, Michael Manivannan, Karthikeyan Iyengar, Balaji
Abstract	Parallel marking algorithms use multiple threads to walk through the object heap graph and mark each reachable object as live. Parallel marker threads mark an object "live" by atomically setting a bit in a mark-bitmap or a bit in the object header. Most of these parallel algorithms strive to improve the marking throughput by using work-stealing algorithms for load-balancing and to ensure that all participating threads are kept busy. A purely "processor-centric" load-balancing approach in conjunction with a need to atomically set the mark bit, results in significant contention during parallel marking. This limits the scalability and throughput of parallel marking algorithms. We describe a new non-blocking and lock-free, work-sharing algorithm, the primary goal being to reduce contention during atomic updates of the mark-bitmap by parallel task-threads. Our work-sharing mechanism uses the address of a word in the mark-bitmap as the key to stripe work among parallel task-threads, with only a subset of the task-threads working on each stripe. This filters out most of the contention during parallel marking with 20% improvements in performance. In case of concurrent and on-the-fly collector algorithms, mutator threads also generate marking-work for the marking task-threads. In these schemes, mutator threads are also provided with thread-local marking stacks where they collect references to potentially "gray" objects, i.e., objects that haven't been "marked-through" by the collector. We note that since this work is generated by mutators when they reference these objects, there is a high likelihood that these objects continue to be present in the processor cache. We describe and evaluate a scheme to distribute mutator generated marking work among the collector's task-threads that is cognizant of the processor and cache topology. We prototype both our algorithms within the C4 [28] collector that ships as part of an industrial strength JVM for the Linux-X86 platform.
Starting Page	61
Ending Page	72
Page Count	12
File Format	PDF
ISBN	9781450313506
DOI	10.1145/2258996.2259006
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2012-06-15
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Work-stealing Prefetching Processor and cache topology Scalable parallel algorithms Compare-and-swap instruction Concurrent marking Work-sharing Parallel marking
Content Type	Text
Resource Type	Article

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