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| Content Provider | ACM Digital Library |
|---|---|
| Author | Diessel, Oliver Gong, Lingkan |
| Abstract | Dynamically reconfigurable systems increase design density and flexibility by allowing hardware modules to be swapped at run time. Systems that employ checkpointing, periodic or phased execution, preemptive multitasking and resource defragmentation, may also need to be able to save and restore the state of a module that is being reconfigured. Existing tools verify the functionality of a system that is undergoing reconfiguration. These tools can also be employed if state is accessed using application logic. However, when state is accessed via the configuration port, functional verification is hindered because the FPGA fabric, which mediates the transfer of state between the application logic and the configuration port, is not being simulated. We describe how to efficiently simulate those aspects of the fabric that are used in accessing module state. To the best of our knowledge, this work is the first to allow cycle-accurate simulation of a system partially reconfiguring both its logic and state and a case study shows that our method is effective in detecting device independent design errors. |
| Starting Page | 241 |
| Ending Page | 244 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781450311557 |
| DOI | 10.1145/2145694.2145735 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2012-02-22 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Subject Keyword | Dynamically reconfigurable systems Fpga State saving and restoration Verification |
| Content Type | Text |
| Resource Type | Article |
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